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Prof. Sharygina directs the USI Formal Verification and Security group whose research deals with improving the program development process through formal methods of specification and verification. Prof. Sharygina’s research has been funded by multiple grants including the CMU SEI Independent R&D grants, Tasso Career, the Swiss National Foundation, and European Union Research grants. Prof. Sharygina has authored more than 55 research papers in areas of formal verification, and system design. She served on program committees of various conferences (e.g., TACAS, FMCAD, CAV), given keynote and invited presentations, and co-chaired several workshops in the area of formal verification. Prof. Sharygina is chairing FMCAD 2010 and CAV 2013, the major conferences in computer-aided verification and design.
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